1. Field of the Invention
The present invention relates to a method for modifying a circuit within a substrate, and more particularly, to a method for modifying an integrated circuit including a plurality of electrodes.
2. Related Prior Arts
FIGS. 14˜17 illustrate the conventional processes for modifying an integrated circuit. First, a layered structure (74) formed on the selected electrode (73) is removed by shooting the focused ion beam (FIB) (72) or the laser beam in order to form a contact hole (75), where the electrode (73) is exposed. The layered structure (74) generally includes conductive layers, semiconductive layers, and insulation layers etc. Then a nozzle (721) ejects gas molecules, with focused ion beam (FIB) (72) or the laser beam, into the contact hole (75), which is further deposited a conductive material to form electrically conductive piers (76). Alternatively, as shown in FIGS. 16 and 17, the insulation film (77) is deposited first on the inner wall of each contact hole (75), and afterwards the electrically conductive pier (76) is formed over the insulation films (77) by the deposition of a conductive material. At last, the conductive piers (76) are adapted to connect with each other via the conductive bridge floor (78), which is formed by depositing the same material with the piers(76). However, such conventional structure has large resistance, particularly for two electrodes distant away from each other and the bridge floor is longer. Therefore, new technologies for reducing resistance are developed.
Van Doorselaer et al. disclosed a method in which plated copper is provided accompanied with chemical vapor deposition, such as focused ion beam, to form a low-resistance wire; referring to “How to Use Cu-Plating for Low Ohmic Long-Distance FIB Connections” published in “20th International Symposium for Testing and Failure Analysis, 1994/11/13-18, pp. 397-405'. By plating copper outside the high-resistance wire formed with the focused ion beam of the chemical vapor deposition, resistance of the wire could be reduced.
U.S. Pat. No. 5,429,994 mentioned a solution in which an electro-less process is applied to deposit an additional conductive material outside a wire formed with the focused ion beam of the chemical vapor deposition.
U.S. Pat. No. 6,692,995 mentioned another method to obtain a low-resistance wire by means of the sputtering or evaporation of the conductive material.
R.O.C. Patent No. 86110359 disclosed a method in which a transparent mask is provided for sputtering or evaporating the conductive material to form a long wire with low resistance.
Though the above methods perform effect in reducing resistance, it takes long time during these complex and unstable processes. As a result, the circuit existed on the chip are easily destroyed and failed.
Besides, while connections between the electrodes of the integrated circuit could be changed by applying the above processes with the FIB, adding additional devices to the integrated circuit is still impossible. Therefore, the need of modifying the integrated circuits remains unsatisfied.